The present invention relates to a semiconductor device and a method of manufacturing the same, and in particular, relates to a technique effectively applied to a semiconductor device including a plurality of magnetic memory elements and a method of manufacturing the same.
Japanese patent laid-open No. 2004-103071 (Patent Document 1) describes a technique related to a magnetic memory device that is unlikely to be affected by a disturbing magnetic field. Specifically, a magnetic guide comprising a high-permeability soft magnetic material is disposed at a location in contact with or immediately adjacent to a magnetic memory so as to reduce the effect of a disturbing magnetic field on the magnetic memory. In Patent Document 1, with regard to die bonding of the magnetic memory (semiconductor chip) over a lead frame, the lead frame comprises a high-permeability material and the semiconductor chip is mounted over this lead frame. Patent Document 1 describes a technique of forming the magnetic shield by coating also the surface of the semiconductor chip with a high-permeability material.
Japanese patent laid-open No. 2003-115578 (Patent Document 2) describes a technique of achieving a non-volatile memory capable of high speed recording/reproduction by protecting an MRAM (Magnetic Random Access Memory) from an external magnetic field and thereby preventing malfunctions due to the external magnetic field and improving the stability in recording/reproducing operations of a memory element. Specifically, Patent Document 2 describes a technique of forming a structure in which the MRAM chip is covered with an insulating layer and the periphery thereof is covered with a magnetic shield structure except an electrode pad portion serving as an interface with the outside.
Japanese patent laid-open No. 2004-193247 (Patent Document 3) describes a technique of magnetically shielding an MRAM element sufficiently even against a high external magnetic field. Here, it is described that magnetically shielding the MRAM element can guarantee the operations without any problem against an external magnetic field, and also can contribute to a reduction in size and weight of electronic appliances. Specifically, it is described that in the MRAM element comprising a TMR element, wherein a magnetization fixed layer whose magnetization direction is fixed and a recording layer whose magnetization direction is variable are laminated, the TMR element is magnetically shielded by a high-saturation magnetization material layer exhibiting a high saturation magnetization of 1.8 tesla (T) or more.
Japanese patent laid-open No. 2004-47656 (Patent Document 4) describes a technique of efficiently manufacturing an MRAM element having a sufficient magnetic shield effect against an external magnetic field. Specifically, it is described as follows. In the lower surface of a transistor portion on the element mounting surface side of the MRAM element and in the upper surface of a bit line opposite to the element mounting surface side, a first magnetic shield layer and a second magnetic shield layer are formed using a soft magnetic metal, respectively, and then a passivation film is formed over the second magnetic shield layer. This suppresses a penetrated magnetic flux from an external magnetic field to an inverting magnetic field strength of the MRAM element or less, thereby improving the reliability. Furthermore, by using the soft magnetic metal for the first magnetic shield layer and the second magnetic shield layer, these shield layers can be formed by sputtering. If this soft magnetic metal is used partially in common with target elements that form each layer of the MRAM element, the first magnetic shield layer and the second magnetic shield layer can be efficiently formed using the same sputtering apparatus as used in forming each layer of the MRAM element. According to Patent Document 4, a high-permeability magnetic shield is formed in both the front surface, in which an MRAM element is formed, and the rear surface of a semiconductor chip, and the resultant semiconductor chip can be mounted to a lead frame.
Japanese patent laid-open No. 2003-309196 (Patent Document 5) describes a technique of improving the record retention properties of an MRAM element. Specifically, in a magnetic shield package in which the MRAM element is sealed surrounded by a soft magnetic shield member, in low frequency magnetic fields a magnetic flux reaching the magnetic shield member propagates the inside of the magnetic shield member due to the contribution of a real part of the permeability thereof, and thereby changing the direction of the magnetic flux. Moreover, in high frequency magnetic fields, the magnetic flux is absorbed inside the magnetic shield member due to the contribution of an imaginary part of the permeability. Furthermore, the periphery of the MRAM element is surrounded by the magnetic shield member and the MRAM element is protected against magnetic fluxes from various directions. Accordingly, the effect of an external magnetic field on the MRAM element can be suppressed and the record retention reliability of the MRAM element can be improved.
Japanese patent laid-open No. 2004-221463 (Patent Document 6) describes a technique of magnetically shielding an MRAM element sufficiently even against a high external magnetic field and ensuring the operations without any problem against the an external magnetic field. Specifically, in the MRAM element comprising a TMR element wherein a magnetization fixed layer whose magnetization direction is fixed and a recording layer whose magnetization direction is variable are laminated, the TMR element is magnetically shielded by a magnetic shield layer. At this time, the magnetic shield layer comprises a laminated structure including at least two soft magnetic material layers, and this laminated structure includes a high-permeability material layer and a high-saturation magnetization material layer.